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Ecampus Schedule of Classes - Winter 2026

College of Engineering

ECE 204 – Digital Logic Design (4)

Design, minimize, and simulate combinational and sequential circuits using a Hardware Description Language (HDL). Develop simulation and hardware implementations, utilizing Field Programable Gate Arrays (FPGA), for logic designs within the course. This course may be subject to Enforced Prerequisites that restrict registration into the course. Check the offerings below for more information.

For more information, contact OSU Ecampus at 800-667-1465 (option 1) or ecampus.ess@oregonstate.edu.

Continue to Registration.

TermCRNSecCrP/NInstructorTypeStatusCapAvailWL CapWL Avail
0429204004Staff0TBD0000
Registration Restrictions
Enforced Prereqs: (MTH 231 [C] or MTH 231H [C] ) or (MTH 251Z [C] or MTH 251HZ [C] or MTH 251 [C] or MTH 251H [C] )
Major Restrictions: +039 (Electrical and Computer Engineering)
Campus Restrictions: -C (Corv)
College Limitations: +16 (Engr)
Class Notes: Campus restrictions end Monday of Week 10This course requires online proctored testing, which mayinclude testing fees and the use of security measures, suchas a scan of your testing environment. Please carefullyreview online proctor test information at:https://ecampus.oregonstate.edu/services/proctoring .

Textbooks  [ Textbooks]

Syllabus: Available in Canvas to students enrolled in this course. Or contact department to request syllabus.
Find textbooks for ECE 204 at the OSU Beaver Store (current term only). For questions related to course materials, contact the OSU Beaver Store.

View ECE 204 for all available terms


Legend
= Signifies the course as a Baccalaureate Core Course.
= Signifies that fees may apply to the course.
+ = Include restriction.
- = Exclude restriction.
* = Prereq may be taken prior to or simultaneously with this course.