Ecampus Schedule of Classes - Spring 2027
ECE 204 – Digital Logic Design (4)
Design, minimize, and simulate combinational and sequential circuits using a Hardware Description Language (HDL). Develop simulation and hardware implementations, utilizing Field Programable Gate Arrays (FPGA), for logic designs within the course. This course may be subject to Enforced Prerequisites that restrict registration into the course. Check the offerings below for more information.
For more information, contact OSU Ecampus at 800-667-1465 (option 1) or ecampus.ess@oregonstate.edu.
Continue to Registration.
| Term | CRN | Sec | Cr | P/N | Instructor | Type | Status | Cap | Avail | WL Cap | WL Avail | ||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Individual ECE 204 course data is not available at this time. Please check back later. You may also view the ECE 204 course details on the OSU General Catalog & Schedule of Classes. | |||||||||||||||
View ECE 204 for all available terms
Academic calendar
Currently it's summer term. See academic calendar for our quarter term schedule.
Fall term starts Sept. 23.
Winter term starts Jan. 4, 2027.
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